LSI Design Flow Development for Advanced Technology

LSIs that adopt advanced technologies, as represented by imaging LSIs, now contain 30 million or more logic gates and the scale is beginning to approach the level of 100 million gates. As compared with the 90 nm process generation, this is three to ten times the number of gates. With advanced technologies such as 40 nm and 28 nm, the process characteristics become remarkably complex and wiring resistance rapidly increases, which unavoidably means that more sign-off corners and more accurate sign-off and layout tools are required. In addition, mask design rules, which are process requirements, are constantly increasing in complexity and the 28 nm process requires twice as many mask design rules as the 90 nm one. To address these changing needs in the areas of design and technology, Fujitsu Semiconductor is developing new features for the LSI design environment called Reference Design Flow for introduction into LSI design. This has reduced the turnaround time (TAT) of LSI development adopting advanced technologies. This paper describes the characteristics and effects of Reference Design Flow newly enhanced for advanced technologies.